The following information is a technical guide to the design of the device. Most people will probably want to skip it – our devices are designed to be plug-and-play, and dead simple to use. For those who are interested in what’s happening inside, please read on.
About the Halide bridge
S/PDIF – “Sony / Philips Digital Interface” – is a widely used standard for transmitting digital audio. The information is encoded and transmitted into single line, using bi-phase mark encoding. The signal can be transmitted by one of two physical formats:
- 75 ohm impedance coaxial cable. The signal is carried by a voltage (typically 1 volt peak-to-peak, unloaded) down a controlled impedance cable, which is terminated at both ends in 75 ohms to avoid reflections. This cable is best terminated by a 75 ohm BNC connector. Although RCA connectors and jacks are frequently used, a standard RCA jack cannot maintain a true 75 ohm impedance, due to the geometry of the connector. (Some manufacturers do 75 ohm connectors, which must be mated with a specially designed 75 ohm RCA jack to keep the correct impedance.)
- Optical fiber (Toslink). Since the coaxial transmission is much more common for high end audio, optical will not be discussed here.
The goal of any S/PDIF converter is to convey the exact bits in the audio signal, with the least amount of jitter possible. Pretty much all S/PDIF devices can deliver the correct bits, although it is important that the device have the resolution needed to play the file.
However, the timing is a different matter. Timing errors in the signal can come from a number of different sources: noisy power supplies or clocks, timing errors already present on the audio signal being encoded, and noise in the transmission line, just to name a few.
Most S/PDIF receiver devices will add at least some jitter reduction, especially in the higher frequencies, since the PLL (phase-locked loop) circuitry used to recover the signal typically requires filtering in order to work. In addition, some more advanced digital to analog converters incorporate additional reclocking circuitry, which reduces the jitter noise throughout the audio band. However, a typical S/PDIF receiver usually has little or no jitter attenuation throughout the audio band and below, meaning much of the audible jitter in the incoming signal is simply passed into the output digital signal (typically a three-line audio signal, such as I2S or right-justified).
Still, attenuation of high frequency jitter is not perfect, and there is always a lower frequency limit below which the reclocking circuitry will not work. For these reasons, it is critical the the S/PDIF signal itself have very low timing deviation, through and below the audio band.
The Bridge is based around the sophisticated USB receiver code, Streamlength by Wavelength Audio. The Streamlength firmware, running on the TAS1020B, allows for several key advantages:
- Streamlength is completely plug-and-play. For a single cable design, not having to deal with installing drivers is critical. Streamlength also automatically allows the user to select the output frequency of the device – 44.1, 48, 88.2, or 96 kHz (Note: 88.2 may not be supported under Windows Vista/7). This allows audio to be run at the native sampling rate, or can be used to add an additional level of oversampling. (For instance, selecting 88.2 kHz when playing an audio CD will give 2x oversampling, before the signal even reaches the DAC.)
- Streamlength allows for 24-bit audio, at sampling rates of 44.1, 48, 88.2, and 96 kHz. This allows for playing a huge range of files, from CDs (or rips of CDs) to newer, high-res audio files.
- Most crucially, Streamlength allows the audio device itself – in this case, the Bridge – to run the master timing of the audio system. So, rather than the computer running the master clock, and the audio device slaving to this, the main system clock is on the device, and the rest of the system slaves to this.
The last feature, which is frequently referred to by the technical name “asynchronous” (as opposed to “isosynchronous”), is the key to obtaining ultra-low jitter on USB devices. With asynchronous USB receivers, the jitter is essentially limited only by the clocks on the audio device, plus any [typically very small] timing errors from additional logic gates that the clock signal must travel through.
Note that since the Bridge can run at two sets of completely unrelated frequencies (44.1 and 88.1 kHz, as well as 48 and 96 kHz), there are two separate master clocks inside the system, one running at a multiple of 44.1 kHz, and the other running at a multiple of 48 kHz. Only one clock, designated as the “master clock” is active at a time, depending on the datarate selected. The two clock system allows the system to output the signal without any resampling.
Critical to any high-end audio design is the power supply. Since the Bridge is powered through the USB connection, the power coming from the computer is supplied at 5 volts, though is typically not terribly clean, due to noise in the computer and other attached peripherals, such as hard drives.
In order to supply clean power to the on-board circuitry, the Bridge uses a combination of power supply filtering and an newly released power down regulater. Power coming into the device is first PI filtered (CLC), which gives a two-pole attenuation for noise above roughly 3 kHz. This works to eliminate high frequency noise, which down-regulators are typically not as good at rejecting.
This filtered signal, which is slightly less than 5 V (due to resistive elements in the passive filter), is down regulated to 3.3 V for the digital electronics, and a separate 3 V line for the clocks.
Note that down-regulators tend to be excellent at rejecting noise at DC and lower frequencies, the rejection ratio falls off at higher frequencies. The combination of an initial LC filter and a regulator with high PSRR (70 dB at 10 Hz, a reduction factor of over 3,000), ultralow noise regulator insure that the clocks and the digital circuitry can operate as accurately as possible.
S/PDIF encoding and output stage
The output from the TAS1020B is in I2S, which is converted to the bi-phase encoded (S/PDIF) format with a S/PDIF transceiver chip. In order to insure that the chip has not added any jitter, the output from this device is clocked a final time by the original master clock of the system, using a D-type flip-flop.
In order to isolate the output from the (potentially noisy) computer ground, and to avoid the possibility of ground loop noise, SPDIF commonly employs an output transformer. We use a small, high-quality output transformer, which allows excellent isolation and signal integrity in a small package.
A key feature of the Bridge is the small size. The small size wound up being somewhat of an after-thought in design – the original plan was to build the best possible circuit, and it turns out that we were able to build it quite small. Much of this has to do with the use of Streamlength. Because the core components are quite small and require no additional jitter reduction circuitry (such as asynchronous resampling), which can take up quite a bit of board space, the entire device can be built into the plug.
The enclosure is custom manufactured by CNC from high quality aluminum. The BNC connector version is a standard 75 ohm BNC connector (gold pin, of course), custom milled so it can connect to the enclosure during assembly. Alternatively, the device is available with an RCA connection. This is the silver bullet plug, by Eichmann.